In some high-speed applications, it's necessary to reduce level swing of CMOS (complementary metal oxide semiconductor) with high-speed signals to get better working characteristics. As an example, in the high-speed charge pump switch control circuit, if the control signal is in a low swing, then the charge pump switch is kept working in a saturation region, thereby obtaining a constant charge and discharge current, decreasing the setup time of signal edge, and reducing the charge feed-through of the switch tube. As another example, in the high-speed or ultra-high-speed differential data signal processing circuit, a low swing signal can reduce power consumption, reduce setup time of the signal edge, and increase linear range of the input. Therefore, various level conversion circuits are widely used in a variety of high-speed applications.
The structure of existing fully differential level conversion circuit is showed in FIG. 1. As shown in FIG. 1, the existing fully differential level conversion circuit includes a positive signal branch and a negative signal branch, the positive signal branch and the negative signal branch have identical structural features, both of which include a drive terminal and a load terminal. When operates, an external fully differential signal will be inputted to the drive terminals of the positive signal branch and the negative signal branch respectively. Concretely, a fully differential signal INP is inputted to the drive terminal of the positive signal branch, which will be converted by the positive signal branch to output a fully differential signal OUTN from the load terminal of the positive signal branch finally. Similarly, a fully differential signal INN is inputted to the drive terminal of the negative signal branch, which will be converted by the negative signal branch to output a fully differential signal OUTP from the load terminal of the negative signal branch finally. Specifically, the drive terminal of the positive signal branch consists of Field Effect Transistors M11 and M12, and its load terminal consists of Field Effect Transistors M13 and M14; while the drive terminal of the negative signal branch consists of Field Effect Transistors M15 and M16, and its load terminal consists of Field Effect Transistors M17 and M18, Specific connections of each Field Effect Transistor are showed in FIG. 1, which are not described in detail. Furthermore, the working process of the fully differential level conversion circuit is that, for the positive signal branch, if the fully differential signal INP inputted is a low level, then the Field Effect Transistor M11 is turned on, the Field Effect Transistor M12 is turned off, the Field Effect Transistor M13 is turned off, and the Field Effect Transistor M14 is turned on, that is only the Field Effect Transistor M14 which is an N-type Field Effect Transistor connected in a diode works as a load, thereby making the Field Effect Transistor M11 not to work as the same as a standard CMOS inverter to drag the output signal OUTN up to the supply voltage VDD, but to divide the voltage on the Field Effect Transistor M11 through the Field Effect Transistor M14 to obtain a high swing level which is not the supply voltage VDD. Otherwise, if the fully differential signal INP inputted is a high level, then the Field Effect Transistor M11 is turned off, the Field Effect Transistor M12 is turned on, the Field Effect Transistor M13 is turned on, and the Field Effect Transistor M14 is turned off, that is only the Field Effect Transistor M13 which is a P-type Field Effect Transistor connected in a diode works as the load, thereby making the Field Effect Transistor M12 not to work as the same as a standard CMOS inverter to drag the output signal OUTN down to the ground, but to divide the voltage on the Field Effect Transistor M12 through the Field Effect Transistor M13 to obtain a low swing level which is not the ground. Finally, the output signal OUTN gets a middle level which is higher than the ground and lower than the supply voltage. Similarly, analysis for the negative signal branch is the same as that for the positive signal branch, and the input and output waveforms are showed in FIG. 2.
While, since the Field Effect Transistors M11, M12, M15 and M16 in the above fully differential level conversion circuit are mismatched due to their process corner changes, the charge and discharge current of the output load point OUTN/OUTP made by the circuit is inconsistent, therefore slopes of rising edge and falling edge of the output signal are different (as the waveforms showed in FIG. 2), thereby resulting in a duty cycle deterioration for the output signal.
Therefore, it is necessary to provide an improved fully differential level conversion circuit to overcome the above drawbacks.